I received my S-DES ASICs back from MOSIS at the beginning of the fall semester, and needed to test them (one of MOSIS’s requirements for offering free ASICs to Universities). I could have used the Agilent 16902B Logic Analysis System that we have here at GW, but since I was taking a graduate VLSI class, I decided to design my own ASIC tester using a Altera DE2-70 development board. Plus, it wouldn’t have been as fun to use the logic analyzer!
ATE Implementation Connected to ASIC